00001 00018 #ifndef __E1000_HW_H 00019 #define __E1000_HW_H 00020 00021 #include <stdint.h> 00022 00031 typedef struct e1000_rx_desc 00032 { 00033 u32_t buffer; 00034 u32_t buffer_h; 00035 u16_t length; 00036 u16_t checksum; 00037 u8_t status; 00038 u8_t errors; 00039 u16_t special; 00040 } 00041 e1000_rx_desc_t; 00042 00046 typedef struct e1000_tx_desc 00047 { 00048 u32_t buffer; 00049 u32_t buffer_h; 00050 u16_t length; 00051 u8_t checksum_off; 00052 u8_t command; 00053 u8_t status; 00054 u8_t checksum_st; 00055 u16_t special; 00056 } 00057 e1000_tx_desc_t; 00058 00063 union ich8_hws_flash_status 00064 { 00065 struct ich8_hsfsts 00066 { 00067 unsigned flcdone :1; 00068 unsigned flcerr :1; 00069 unsigned dael :1; 00070 unsigned berasesz :2; 00071 unsigned flcinprog :1; 00072 unsigned reserved1 :2; 00073 unsigned reserved2 :6; 00074 unsigned fldesvalid :1; 00075 unsigned flockdn :1; 00076 } hsf_status; 00077 u16_t regval; 00078 }; 00079 00084 union ich8_hws_flash_ctrl 00085 { 00086 struct ich8_hsflctl 00087 { 00088 unsigned flcgo :1; 00089 unsigned flcycle :2; 00090 unsigned reserved :5; 00091 unsigned fldbcount :2; 00092 unsigned flockdn :6; 00093 } hsf_ctrl; 00094 u16_t regval; 00095 }; 00096 00101 union ich8_hws_flash_regacc 00102 { 00103 struct ich8_flracc 00104 { 00105 unsigned grra :8; 00106 unsigned grwa :8; 00107 unsigned gmrag :8; 00108 unsigned gmwag :8; 00109 } hsf_flregacc; 00110 u16_t regval; 00111 }; 00112 00123 #define E1000_RX_STATUS_PIF (1 << 7) 00124 00126 #define E1000_RX_STATUS_EOP (1 << 1) 00127 00129 #define E1000_RX_STATUS_DONE (1 << 0) 00130 00141 #define E1000_RX_ERROR_RXE (1 << 7) 00142 00144 #define E1000_RX_ERROR_CXE (1 << 4) 00145 00147 #define E1000_RX_ERROR_SEQ (1 << 2) 00148 00150 #define E1000_RX_ERROR_CE (1 << 0) 00151 00162 #define E1000_TX_CMD_EOP (1 << 0) 00163 00165 #define E1000_TX_CMD_FCS (1 << 1) 00166 00168 #define E1000_TX_CMD_RS (1 << 3) 00169 00174 #endif /* __E1000_HW_H */
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