#include "../drivers.h"#include "../libdriver/driver.h"#include "../libdriver/drvlib.h"Go to the source code of this file.
Defines | |
| #define | VERBOSE 0 |
| #define | ENABLE_ATAPI 1 |
| #define | ATAPI_DEBUG 0 |
| #define | REG_CMD_BASE0 0x1F0 |
| #define | REG_CMD_BASE1 0x170 |
| #define | REG_CTL_BASE0 0x3F6 |
| #define | REG_CTL_BASE1 0x376 |
| #define | PCI_CTL_OFF 2 |
| #define | PCI_DMA_2ND_OFF 8 |
| #define | REG_DATA 0 |
| #define | REG_PRECOMP 1 |
| #define | REG_COUNT 2 |
| #define | REG_SECTOR 3 |
| #define | REG_CYL_LO 4 |
| #define | REG_CYL_HI 5 |
| #define | REG_LDH 6 |
| #define | LDH_DEFAULT 0xA0 |
| #define | LDH_LBA 0x40 |
| #define | LDH_DEV 0x10 |
| #define | ldh_init(drive) (LDH_DEFAULT | ((drive) << 4)) |
| #define | REG_STATUS 7 |
| #define | STATUS_BSY 0x80 |
| #define | STATUS_RDY 0x40 |
| #define | STATUS_WF 0x20 |
| #define | STATUS_SC 0x10 |
| #define | STATUS_DRQ 0x08 |
| #define | STATUS_CRD 0x04 |
| #define | STATUS_IDX 0x02 |
| #define | STATUS_ERR 0x01 |
| #define | STATUS_ADMBSY 0x100 |
| #define | REG_ERROR 1 |
| #define | ERROR_BB 0x80 |
| #define | ERROR_ECC 0x40 |
| #define | ERROR_ID 0x10 |
| #define | ERROR_AC 0x04 |
| #define | ERROR_TK 0x02 |
| #define | ERROR_DM 0x01 |
| #define | REG_COMMAND 7 |
| #define | CMD_IDLE 0x00 |
| #define | CMD_RECALIBRATE 0x10 |
| #define | CMD_READ 0x20 |
| #define | CMD_READ_EXT 0x24 |
| #define | CMD_READ_DMA_EXT 0x25 |
| #define | CMD_WRITE 0x30 |
| #define | CMD_WRITE_EXT 0x34 |
| #define | CMD_WRITE_DMA_EXT 0x35 |
| #define | CMD_READVERIFY 0x40 |
| #define | CMD_FORMAT 0x50 |
| #define | CMD_SEEK 0x70 |
| #define | CMD_DIAG 0x90 |
| #define | CMD_SPECIFY 0x91 |
| #define | CMD_READ_DMA 0xC8 |
| #define | CMD_WRITE_DMA 0xCA |
| #define | ATA_IDENTIFY 0xEC |
| #define | REG_CTL 0 |
| #define | CTL_NORETRY 0x80 |
| #define | CTL_NOECC 0x40 |
| #define | CTL_EIGHTHEADS 0x08 |
| #define | CTL_RESET 0x04 |
| #define | CTL_INTDISABLE 0x02 |
| #define | REG_CTL_ALTSTAT 0 |
| #define | ID_GENERAL 0x00 |
| #define | ID_GEN_NOT_ATA 0x8000 |
| #define | ID_CAPABILITIES 0x31 |
| #define | ID_CAP_LBA 0x0200 |
| #define | ID_CAP_DMA 0x0100 |
| #define | ID_FIELD_VALIDITY 0x35 |
| #define | ID_FV_88 0x04 |
| #define | ID_MULTIWORD_DMA 0x3f |
| #define | ID_MWDMA_2_SEL 0x0400 |
| #define | ID_MWDMA_1_SEL 0x0200 |
| #define | ID_MWDMA_0_SEL 0x0100 |
| #define | ID_MWDMA_2_SUP 0x0004 |
| #define | ID_MWDMA_1_SUP 0x0002 |
| #define | ID_MWDMA_0_SUP 0x0001 |
| #define | ID_CSS 0x53 |
| #define | ID_CSS_LBA48 0x0400 |
| #define | ID_ULTRA_DMA 0x58 |
| #define | ID_UDMA_5_SEL 0x2000 |
| #define | ID_UDMA_4_SEL 0x1000 |
| #define | ID_UDMA_3_SEL 0x0800 |
| #define | ID_UDMA_2_SEL 0x0400 |
| #define | ID_UDMA_1_SEL 0x0200 |
| #define | ID_UDMA_0_SEL 0x0100 |
| #define | ID_UDMA_5_SUP 0x0020 |
| #define | ID_UDMA_4_SUP 0x0010 |
| #define | ID_UDMA_3_SUP 0x0008 |
| #define | ID_UDMA_2_SUP 0x0004 |
| #define | ID_UDMA_1_SUP 0x0002 |
| #define | ID_UDMA_0_SUP 0x0001 |
| #define | DMA_COMMAND 0 |
| #define | DMA_CMD_WRITE 0x08 |
| #define | DMA_CMD_START 0x01 |
| #define | DMA_STATUS 2 |
| #define | DMA_ST_D1_DMACAP 0x40 |
| #define | DMA_ST_D0_DMACAP 0x20 |
| #define | DMA_ST_INT 0x04 |
| #define | DMA_ST_ERROR 0x02 |
| #define | DMA_ST_BM_ACTIVE 0x01 |
| #define | DMA_PRDTP 4 |
| #define | LBA48_CHECK_SIZE 0x0f000000 |
| #define | LBA_MAX_SIZE 0x0fffffff |
| #define | ERROR_SENSE 0xF0 |
| #define | SENSE_NONE 0x00 |
| #define | SENSE_RECERR 0x10 |
| #define | SENSE_NOTRDY 0x20 |
| #define | SENSE_MEDERR 0x30 |
| #define | SENSE_HRDERR 0x40 |
| #define | SENSE_ILRQST 0x50 |
| #define | SENSE_UATTN 0x60 |
| #define | SENSE_DPROT 0x70 |
| #define | SENSE_ABRT 0xb0 |
| #define | SENSE_MISCOM 0xe0 |
| #define | ERROR_MCR 0x08 |
| #define | ERROR_ABRT 0x04 |
| #define | ERROR_EOM 0x02 |
| #define | ERROR_ILI 0x01 |
| #define | REG_FEAT 1 |
| #define | FEAT_OVERLAP 0x02 |
| #define | FEAT_DMA 0x01 |
| #define | REG_IRR 2 |
| #define | IRR_REL 0x04 |
| #define | IRR_IO 0x02 |
| #define | IRR_COD 0x01 |
| #define | REG_SAMTAG 3 |
| #define | REG_CNT_LO 4 |
| #define | REG_CNT_HI 5 |
| #define | REG_DRIVE 6 |
| #define | REG_STATUS 7 |
| #define | STATUS_BSY 0x80 |
| #define | STATUS_DRDY 0x40 |
| #define | STATUS_DMADF 0x20 |
| #define | STATUS_SRVCDSC 0x10 |
| #define | STATUS_DRQ 0x08 |
| #define | STATUS_CORR 0x04 |
| #define | STATUS_CHECK 0x01 |
| #define | ATAPI_PACKETCMD 0xA0 |
| #define | ATAPI_IDENTIFY 0xA1 |
| #define | SCSI_READ10 0x28 |
| #define | SCSI_SENSE 0x03 |
| #define | CD_SECTOR_SIZE 2048 |
| #define | NO_IRQ 0 |
| #define | ATAPI_PACKETSIZE 12 |
| #define | SENSE_PACKETSIZE 18 |
| #define | ERR (-1) |
| #define | ERR_BAD_SECTOR (-2) |
| #define | WAKEUP_SECS 32 |
| #define | WAKEUP_TICKS (WAKEUP_SECS*system_hz) |
| #define | MAX_DRIVES 8 |
| #define | COMPAT_DRIVES 4 |
| #define | MAX_SECS 127 |
| #define | MAX_ERRORS 4 |
| #define | NR_MINORS (MAX_DRIVES * DEV_PER_DRIVE) |
| #define | SUB_PER_DRIVE (NR_PARTITIONS * NR_PARTITIONS) |
| #define | NR_SUBDEVS (MAX_DRIVES * SUB_PER_DRIVE) |
| #define | DELAY_USECS 1000 |
| #define | DELAY_TICKS 1 |
| #define | DEF_TIMEOUT_TICKS 300 |
| #define | RECOVERY_USECS 500000 |
| #define | RECOVERY_TICKS 30 |
| #define | INITIALIZED 0x01 |
| #define | DEAF 0x02 |
| #define | SMART 0x04 |
| #define | ATAPI 0x08 |
| #define | IDENTIFIED 0x10 |
| #define | IGNORING 0x20 |
| #define | NO_DMA_VAR "ata_no_dma" |
Functions | |
| _PROTOTYPE (int main,(int argc, char *argv[])) | |
| _PROTOTYPE | ( | int | main, | |
| (int argc, char *argv[]) | ||||
| ) |
1.5.8